Processor subsystem interconnect architecture for a large symmetric multiprocessing system.
Pak-kin MakGary E. StraitMichael A. BlakeKevin W. KarkVesselina K. PapazovaA. E. (Rick) SeiglerGary A. Van HubenLiyong WangGeorge C. WellwoodPublished in: IBM J. Res. Dev. (2004)