A VLSI architecture for variable block size video motion estimation.
Swee Yeow YapJohn V. McCannyPublished in: IEEE Trans. Circuits Syst. II Express Briefs (2004)
Keyphrases
- variable block size
- motion estimation
- vlsi architecture
- low complexity
- video sequences
- motion estimator
- inter frame
- real time
- video coding
- video data
- motion field
- vlsi implementation
- motion vectors
- video compression
- motion compensation
- video frames
- block size
- motion compensated
- image sequences
- reference frame
- video streams
- coding efficiency
- quadtree
- low power
- optical flow
- rate distortion
- spatial domain
- block matching
- macroblock
- high definition
- super resolution
- multimedia
- video content
- motion model
- computational complexity
- low cost
- key frames
- temporal correlation
- mode decision
- computer vision
- bit plane
- video coding standard
- compressed video
- video conferencing
- video streaming
- wavelet transform
- high speed