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Optimization for application-specific packet-based on-chip interconnects using a cycle-accurate model.

Yu-Ju ShihChih-Tsun HuangJing-Jia LiouJyu-Yuan LaiChih-Wea WangChi-Feng Wu
Published in: VLSI-DAT (2017)
Keyphrases
  • application specific
  • power consumption
  • probabilistic model
  • high speed
  • optimization method
  • conceptual model