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Memory System Optimization for FPGA-Based Implementation of Quasi-Cyclic LDPC Codes Decoders.

Xiaoheng ChenJingyu KangShu LinVenkatesh Akella
Published in: IEEE Trans. Circuits Syst. I Regul. Pap. (2011)
Keyphrases
  • decoding algorithm
  • ldpc codes
  • noise model
  • optimization method
  • error correction
  • computational complexity