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Congestion-aware power grid optimization for 3D circuits using MIM and CMOS decoupling capacitors.
Pingqiang Zhou
Karthikk Sridharan
Sachin S. Sapatnekar
Published in:
ASP-DAC (2009)
Keyphrases
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power grid
power system
high speed
delay insensitive
analog vlsi
circuit design
optimization algorithm
communication networks
smart grid
cmos technology
electric vehicles
neural network
genetic algorithm
computational intelligence
low cost
power consumption