Retinal Processing Emulation in a Programmable 2-Layer Analog Array Processor CMOS Chip.
Ricardo Carmona-GalánFrancisco Jiménez-GarridoRafael Domínguez-CastroServando Espejo-MeanaÁngel Rodríguez-VázquezPublished in: NIPS (2002)
Keyphrases
- array processor
- analog vlsi
- processor array
- single chip
- cmos image sensor
- focal plane
- mesh connected
- circuit design
- low cost
- image sensor
- semantic network
- scan line
- high speed
- mixed signal
- low power
- infrared
- real time
- floating gate
- power consumption
- digital signal processors
- analog to digital converter
- wide dynamic range
- imaging systems
- general purpose
- parallel processing
- binary images
- expert systems
- signal processor
- object recognition
- image processing