I-Cache Tag Reduction for Low Power Chip Multiprocessor.
Long ZhengMianxiong DongSong GuoMinyi GuoLi LiPublished in: ISPA (2009)
Keyphrases
- low power
- high speed
- low cost
- single chip
- multithreading
- power reduction
- mixed signal
- low power consumption
- cmos technology
- power consumption
- rfid tags
- image sensor
- high power
- ultra low power
- power dissipation
- nm technology
- signal processor
- vlsi architecture
- wireless transmission
- shared memory multiprocessor
- vlsi circuits
- computational power
- digital signal processing
- cmos image sensor
- highly efficient
- memory subsystem
- level parallelism
- parallel computing
- hardware and software
- high density
- processor core
- shared memory
- low voltage
- wide dynamic range
- logic circuits
- gate array
- image processing