Optimizing instruction cache performance of embedded systems.
Sandro BartoliniCosimo Antonio PretePublished in: ACM Trans. Embed. Comput. Syst. (2005)
Keyphrases
- embedded systems
- memory hierarchy
- computing power
- instruction set
- low cost
- cache misses
- processing power
- embedded software
- embedded devices
- real time systems
- flash memory
- resource limited
- prefetching
- hardware software
- query processing
- safety critical
- main memory
- data access
- real time image processing
- artificial intelligence
- cooperative
- memory access
- real time
- field programmable gate array