Model Checking of Analog Systems using an Analog Specification Language.
Sebastian SteinhorstLars HedrichPublished in: DATE (2008)
Keyphrases
- model checking
- formal specification
- specification language
- model checker
- temporal logic
- automated verification
- formal methods
- finite state machines
- symbolic model checking
- formal verification
- asynchronous circuits
- pspace complete
- temporal properties
- bounded model checking
- computation tree logic
- reactive systems
- linear temporal logic
- description language
- process algebra
- transition systems
- reachability analysis
- artifact centric
- modal logic
- concurrent systems
- timed automata
- case study
- planning domains
- software components
- knowledge based systems
- general purpose
- software engineering