A new offset cancelled latch comparator for high-speed, low-power ADCs.

Khosrov Dabbagh-Sadeghipour

Published in: APCCAS (2010)

Keyphrases

low power
high speed
wireless transmission
single chip
high power
power consumption
low cost
signal processor
power reduction
logic circuits
vlsi architecture
cmos technology
low power consumption
mixed signal
vlsi circuits
digital signal processing
frame rate
real time