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Modelling delay degradation due to NBTI in FPGA Look-up tables.

Mohammad NaoussFrançois Marc
Published in: FPL (2016)
Keyphrases
  • real time image processing
  • real time
  • high speed
  • hardware architecture
  • hardware implementation
  • search engine
  • signal processing
  • hardware design
  • single chip
  • parallel hardware