Login / Signup

In-system failure investigation on 0.18 μm high speed serial link ASIC using logic built-in self test.

Jeanne Trinko MechlerRaymond J. BulagaJon Garlett
Published in: CICC (2003)
Keyphrases
  • built in self test
  • integrated circuit
  • high speed
  • low power
  • real time
  • link failure
  • single chip
  • high speed networks
  • failure prediction
  • data sets
  • modal logic
  • application specific
  • link structure
  • failure detection