High-Speed FPGA 10's Complement Adders-Subtractors.

Gery Bioul Martín Vazquez Jean-Pierre Deschamps Gustavo Sutter

Published in: Int. J. Reconfigurable Comput. (2010)

Keyphrases

high speed
low power
programmable logic
data acquisition
multiple valued
real time
artificial intelligence
frame rate
high speed networks
bit parallel
data sets
low cost