Linearization of the timing analysis and optimization of level-sensitive digital synchronous circuits.
Baris TaskinIvan S. KourtevPublished in: IEEE Trans. Very Large Scale Integr. Syst. (2004)
Keyphrases
- higher level
- optimization problems
- levels of abstraction
- global optimization
- optimization process
- real time
- asynchronous communication
- high speed
- optimization strategies
- circuit design
- optimization model
- vlsi circuits
- delay insensitive
- optimization method
- simulated annealing
- artificial neural networks
- image processing
- data sets