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A testable design for asynchronous fine-grain pipeline circuits.

Masayuki TsukisakaTakashi Nanya
Published in: PRDC (2000)
Keyphrases
  • fine grain
  • high level synthesis
  • coarse grain
  • circuit design
  • design methodology
  • mobile devices
  • databases
  • image segmentation
  • markov random field
  • computational power
  • parallel computation
  • delay insensitive