A high speed, memory efficient line based VLSI architecture for the dual mode inverse discrete wavelet transform of JPEG2000 decoder.
Pallab Kumar NathSwapna BanerjeePublished in: Microprocess. Microsystems (2016)
Keyphrases
- discrete wavelet transform
- memory efficient
- vlsi architecture
- high speed
- low power
- jpeg compression
- low complexity
- bit plane
- mode decision
- wavelet coefficients
- subband
- distributed video coding
- multiresolution
- image compression
- wavelet domain
- real time
- high frequency
- image fusion
- shift invariant
- wavelet transform
- power consumption
- image coding
- coding method
- low frequency
- bit rate
- video coding standard
- motion estimation
- rate distortion
- compressed images
- video codec
- compression algorithm
- image transmission
- compressed domain
- transform domain
- multiscale
- spatial domain
- wavelet filters
- dct coefficients
- lifting scheme
- similarity measure
- feature vectors
- image quality
- error concealment
- palmprint
- compression ratio