Compromising FPGA SoCs using malicious hardware blocks.
Nisha JacobCarsten RolfesAndreas ZanklJohann HeyszlGeorg SiglPublished in: DATE (2017)
Keyphrases
- field programmable gate array
- hardware implementation
- hardware architecture
- low cost
- parallel hardware
- hardware design
- software implementation
- dedicated hardware
- real time
- single chip
- fpga implementation
- programmable logic
- embedded systems
- fpga device
- hardware architectures
- reconfigurable hardware
- data acquisition
- image processing algorithms
- xilinx virtex
- low power consumption
- fpga technology
- computing systems
- hardware and software
- digital signal processing
- hardware description language
- parallel computing
- efficient implementation
- parallel architecture
- hardware software
- block size
- malicious behavior
- computational power
- fpga hardware
- general purpose processors
- digital signal processors
- gate array
- power reduction
- fractal image coding
- associative memory
- parallel processing
- image processing