Planar clock routing for high performance chip and package co-design.
Qing ZhuWayne Wei-Ming DaiPublished in: IEEE Trans. Very Large Scale Integr. Syst. (1996)
Keyphrases
- high speed
- low power consumption
- signal processor
- power consumption
- low power
- low cost
- signal processing
- routing algorithm
- high density
- low latency
- analog vlsi
- ad hoc networks
- network topology
- routing problem
- software package
- planar surfaces
- circuit design
- programmable logic
- physical design
- vlsi implementation
- real time
- chip design
- shortest path
- embedded dram
- routing decisions
- evolvable hardware
- mobile ad hoc networks
- network topologies
- single chip
- high efficiency
- cost effective
- waveguide
- projector camera
- end to end
- routing protocol
- wireless networks
- web services