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A Memory Efficient Partially Parallel Decoder Architecture for Quasi-Cyclic LDPC Codes.

Zhongfeng WangZhiqiang Cui
Published in: IEEE Trans. Very Large Scale Integr. Syst. (2007)
Keyphrases
  • memory efficient
  • ldpc codes
  • decoding algorithm
  • error correction
  • message passing
  • low density parity check
  • image transmission
  • channel coding
  • rate allocation
  • source coding
  • forward error correction