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A power efficient reconfigurable system-in-stack: 3D integration of accelerators, FPGAs, and DRAM.
Peter Gadfort
Aravind Dasu
Ali Akoglu
Yoon Kah Leow
Michael Fritze
Published in:
SoCC (2014)
Keyphrases
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field programmable gate array
hardware implementation
general purpose
cost effective
memory subsystem
database
neural network
image processing
database systems
wireless sensor networks
main memory
computing systems
design considerations