Iterative-Constructive Standard Cell Placer for High Speed and Low Power.
Sungjae KimEugene ShragowitzPublished in: ICCD (2006)
Keyphrases
- low power
- high speed
- power consumption
- low cost
- single chip
- real time
- low power consumption
- digital signal processing
- high power
- logic circuits
- cmos technology
- vlsi circuits
- frame rate
- vlsi architecture
- wireless transmission
- image sensor
- mixed signal
- digital camera
- power reduction
- energy dissipation
- coding scheme
- signal processor