Optimal Placement-aware Trace-Based Scheduling of Hardware Reconfigurations for FPGA Accelerators.
Joon Edward SimWeng-Fai WongJürgen TeichPublished in: FCCM (2009)
Keyphrases
- field programmable gate array
- optimal placement
- single chip
- hardware implementation
- embedded systems
- hardware architecture
- parallel computing
- hardware design
- software implementation
- computing systems
- image processing algorithms
- fpga implementation
- scheduling problem
- optimal location
- low cost
- parallel hardware
- reconfigurable hardware
- hardware software
- general purpose processors
- fpga device
- fpga technology
- massively parallel
- power system
- parallel machines
- computing platform
- low power
- high end
- computer systems
- xilinx virtex
- shared memory
- parallel processors
- hardware and software
- efficient implementation
- hardware description language