Design of a 12-b asynchronous SAR CMOS ADC.

Jinwoo Kim Shin-Il Lim Kwang Sub Yoon Sangmin Lee

Published in: ISOCC (2011)

Keyphrases

circuit design
analog to digital converter
low cost
single chip
image reconstruction
design considerations
delay insensitive
maximum likelihood
engineering design
multi channel
low voltage
high level synthesis