An FPGA-based accelerator platform implements for convolutional neural network.

Xiao Meng Lixin Yu Zhiyong Qin

Published in: HP3C (2019)

Keyphrases

convolutional neural network
face detection
field programmable gate array
neural network
databases
hardware implementation
parallel implementation
real time
artificial intelligence
machine learning
multimedia
multi agent systems
user interface
object detection
hardware design
hardware architecture