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A 1.8 V 40-MS/sec 10-bit 0.18-㎛ CMOS Pipelined ADC using a Bootstrapped Switch with Constant Resistance.
Ji-Hun Eo
Sang-Hun Kim
Mungyu Kim
Young-Chan Jang
Published in:
J. Inform. and Commun. Convergence Engineering (2012)
Keyphrases
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analog to digital converter
high speed
low power
image sensor
data flow
mixed signal
random access memory
cmos image sensor
real time
data sets
high order
single chip
analog vlsi