A 14-bit 1.2-V low power SAR ADC with digital background calibration in 0.18 μm CMOS.
Xingyuan TongHui GuoXin XinChang ZhangYuanhao HuPublished in: Microelectron. J. (2022)
Keyphrases
- analog to digital converter
- low power
- mixed signal
- power consumption
- high speed
- low cost
- image sensor
- vlsi circuits
- single chip
- multi channel
- cmos image sensor
- low power consumption
- high power
- wide dynamic range
- digital signal processing
- gate array
- power reduction
- logic circuits
- cmos technology
- digital circuits
- vlsi architecture
- wireless transmission
- solid state
- delay insensitive
- image formation
- hardware and software
- sar images
- real time