Formal Verification Aware Redundant Sequential Logic Optimization to Improve Design Utilization.
Rushabh ShahKrishna AgrawalPublished in: ISQED (2021)
Keyphrases
- formal verification
- model checking
- model checker
- bounded model checking
- automated verification
- optimal design
- functional verification
- modal logic
- optimization method
- design process
- neural network
- temporal logic
- software architecture
- symbolic model checking
- optimization problems
- simultaneous optimization
- chip design
- artificial intelligence