An Accelerator-Based Wireless Sensor Network Processor in 130 nm CMOS.
Mark HempsteadDavid M. BrooksGu-Yeon WeiPublished in: IEEE J. Emerg. Sel. Topics Circuits Syst. (2011)
Keyphrases
- wireless sensor networks
- high speed
- silicon on insulator
- cmos technology
- single chip
- ibm power processor
- low power
- parallel processing
- nm technology
- metal oxide semiconductor
- random access memory
- low cost
- power consumption
- energy consumption
- energy efficient
- cmos image sensor
- parallel implementation
- chip design
- sensor nodes
- sensor networks
- energy efficiency
- delay insensitive
- resource limitations
- low voltage
- dynamic random access memory
- instruction set
- power supply
- data transmission
- energy saving
- real time
- resource constrained
- power management
- parallel architectures
- parallel processors
- image sensor
- computer architecture
- integrated circuit