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A two-tier memory architecture for high-performance multiprocessor systems.
Tam M. Nguyen
Vason P. Srini
Alvin M. Despain
Published in:
ICS (1988)
Keyphrases
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multiprocessor systems
distributed memory
inter processor communication
multithreading
embedded dram
memory management
shared memory
memory requirements
access patterns
coarse grained
memory access
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