A 20-MHz to 3-GHz Wide-Range Multiphase Delay-Locked Loop.

Chi-Nan Chuang Shen-Iuan Liu

Published in: IEEE Trans. Circuits Syst. II Express Briefs (2009)

Keyphrases

wide range
clock frequency
high speed
power consumption
level set
piecewise constant
framework for image segmentation
real time
high frequency
parallel computing
high end
high resolution
image compression
level set method