A 26-GHz-Band High Back-Off Efficiency Stacked-FET Power Amplifier IC with Adaptively Controlled Bias and Load Circuits in 45-nm CMOS SOI.
Toshihiko YoshimasuMengchu FangTsuyoshi SugiuraPublished in: IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (2021)
Keyphrases
- silicon on insulator
- power consumption
- cmos technology
- power reduction
- clock gating
- low power
- chip design
- low voltage
- power dissipation
- high speed
- high power
- ibm power processor
- clock frequency
- power saving
- nm technology
- high efficiency
- power management
- frequency band
- dual band
- high sensitivity
- integrated circuit
- energy efficiency
- mixed signal
- vlsi circuits
- high density
- analog vlsi
- infrared
- load balancing
- parallel processing
- random access memory
- delay insensitive
- field effect transistors
- digital signal processing