A Fault Tolerant Design Methodology for a FPGA-Based Softcore Processor.
Paulo GarciaTiago GomesFilipe SalgadoJorge CabralPaulo CardosoMongkol EkpanyapongAdriano TavaresPublished in: CESCIT (2012)
Keyphrases
- fault tolerant
- design methodology
- hardware architecture
- field programmable gate array
- fault tolerance
- hardware implementation
- chip design
- distributed systems
- hw sw
- physical design
- fault isolation
- fuzzy neural network
- parallel computing
- load balancing
- design process
- embedded systems
- parallel processing
- associative memory
- formal specification
- object oriented
- image processing algorithms
- hardware software
- error detection
- peer to peer
- artificial neural networks
- computing systems
- hardware design
- massively parallel
- real time
- digital libraries
- real world