An on-chip metastability measurement circuit to characterize synchronization behavior in 65nm.
Salomon BeerRan GinosarMichael PrielRostislav (Reuven) DobkinAvinoam KolodnyPublished in: ISCAS (2011)
Keyphrases
- cmos technology
- high speed
- circuit design
- analog vlsi
- phase locked loop
- evolvable hardware
- low cost
- metal oxide semiconductor
- silicon on insulator
- low power
- nm technology
- power dissipation
- neural network
- chip design
- data acquisition
- real time
- behavior patterns
- evolutionary algorithm
- vlsi implementation
- programmable logic
- low voltage