Hardware implementation of the double-tree scan architecture.
Nathan SchemmSina BalkirSharad C. SethPublished in: ISCAS (2010)
Keyphrases
- hardware implementation
- dedicated hardware
- hardware architecture
- software implementation
- fpga implementation
- signal processing
- hardware design
- pipeline architecture
- parallel architecture
- efficient implementation
- fpga technology
- image processing algorithms
- field programmable gate array
- memory management
- pipelined architecture
- tree structure
- fpga device
- processing elements
- reconfigurable hardware
- real time
- general purpose
- management system
- general purpose processors
- xilinx virtex
- image binarization
- machine learning