A low complexity hardware architecture for motion estimation.
Daniel LarkinValentin MuresanNoel E. O'ConnorPublished in: ISCAS (2006)
Keyphrases
- low complexity
- hardware architecture
- motion estimation
- hardware implementation
- motion vectors
- image sequences
- video coding
- computational complexity
- hardware architectures
- inter frame
- optical flow
- motion compensation
- lower complexity
- video compression
- motion compensated
- video sequences
- associative memory
- computer vision
- motion field
- video encoding
- reference frame
- block matching
- spatial domain
- distributed video coding
- rate distortion
- field programmable gate array
- bit plane
- xilinx virtex
- video encoder
- block matching motion estimation
- high definition
- coding efficiency
- macroblock
- pattern recognition
- distributed systems