Efficient Hardware Accelerator for IPSec Based on Partial Reconfiguration on Xilinx FPGAs.
Ahmad SalmanMarcin RogawskiJens-Peter KapsPublished in: ReConFig (2011)
Keyphrases
- field programmable gate array
- hardware implementation
- hardware architecture
- parallel architectures
- embedded systems
- fpga implementation
- real time
- low cost
- programmable logic
- parallel computing
- efficient implementation
- image processing algorithms
- fpga technology
- computing systems
- high speed
- hardware design
- cost effective
- high end
- manufacturing systems
- computationally expensive
- dedicated hardware
- fpga device
- neural network