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Microarchitectural Comparison of the MXP and Octavo Soft-Processor FPGA Overlays.
Charles Eric LaForest
Jason Helge Anderson
Published in:
ACM Trans. Reconfigurable Technol. Syst. (2017)
Keyphrases
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high speed
instruction set
single chip
systolic array
digital signal
gate array
xilinx virtex
signal processing
parallel architecture
hardware implementation
real time
peer to peer
field programmable gate array
efficient implementation
parallel processing
input output
low cost
data sets