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Self-correcting Flip-flops for Triple Modular Redundant Logic in a 12-nm Technology.

Lawrence T. ClarkAlen DuvnjakClifford Young-SciortinoMatthew CannonJohn BrunhaverSapan AgarwalJereme NeuendankDonald WilsonHugh J. BarnabyMatthew J. Marinella
Published in: ISCAS (2022)
Keyphrases
  • flip flops
  • power dissipation
  • nm technology
  • power consumption
  • low power
  • digital signal processing
  • cmos technology
  • multiple input
  • finite state machines
  • low cost
  • high speed
  • design methodology
  • neural network