A novel audio playback chip using digitally driven speaker architecture with 80%@-10dBFS power efficiency, 5.5W@3.3V supply and 100dB SNR.
Michitaka YoshinoMitsuhiro IwaideDaigo KuniyoshiHajime OhtaniAkira YasudaJun-ichi OkamuraPublished in: CICC (2011)
Keyphrases
- audio visual
- multithreading
- digital video
- signal to noise ratio
- power consumption
- ibm power processor
- multimedia
- chip design
- multi modal
- real time
- high speed
- automatic transcription
- low power
- memory subsystem
- low cost
- electricity markets
- speech recognition
- nm technology
- analog vlsi
- continuous media
- power dissipation
- cmos technology
- speaker identification
- audio stream
- signal processing
- video streams
- edge detection
- power management
- vlsi implementation
- parallel computing
- design methodology
- video streaming