Backlog-Aware Crossbar Schedulers: A New Algorithm and its Efficient Hardware Implementation.

Nikos Chrysos Giorgos Dimitrakopoulos

Published in: Hot Interconnects (2008)

Keyphrases

hardware implementation
software implementation
efficient implementation
learning algorithm
objective function
image processing algorithms

computationally efficient
detection algorithm
fpga implementation
hardware architecture
single pass
expectation maximization

k means
pipeline architecture
signal processing
hardware design
optimal solution
real time

embedded systems
computational complexity
pattern recognition
image processing
fractal encoding