A 79.2-μW 19.5-kHz-BW 94.8-dB-SNDR Fully Dynamic DT ΔΣ ADC Using CLS-Assisted FIA With Sampling Noise Cancellation.
Akira MatsuokaYo KumanoTomohiro NezukaYoshikazu FurutaTetsuya IizukaPublished in: IEEE Trans. Circuits Syst. II Express Briefs (2023)