SB-Fetch: synchronization aware hardware prefetching for chip multiprocessors.
Laith M. AlBarakatPaul V. GratzDaniel A. JiménezPublished in: ICS (2020)
Keyphrases
- prefetching
- multithreading
- low cost
- vlsi implementation
- cache misses
- response time
- single chip
- access patterns
- web prefetching
- access latency
- web documents
- caching scheme
- web caching
- ibm power processor
- web page prediction
- hit rate
- user perceived latency
- memory access
- computational power
- cache replacement
- parallel architecture
- parallel computing
- hit ratio
- computing systems
- image sensor
- distributed memory
- web objects
- web logs
- shared memory
- embedded systems
- highly efficient
- parallel implementation
- replacement policy
- hardware implementation