Switch allocator for bufferless network-on-chip routers.

Giorgos Dimitrakopoulos Kostas Galanopoulos

Published in: INA-OCMC@HiPEAC (2011)

Keyphrases

network on chip
high speed
routing algorithm
network simulator
multi processor
end to end
load balancing
power dissipation
low power
packet switched
data transfer
network traffic
ip networks
ad hoc networks
program execution
power consumption
data acquisition
real time
multipath
interconnection networks