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FPGA accelerated multipliers over binary composite fields constructed via low hamming weight irreducible polynomials.
Chang Shu
Soonhak Kwon
Kris Gaj
Published in:
IET Comput. Digit. Tech. (2008)
Keyphrases
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hamming distance
high speed
real time
computer vision
non binary
low cost
signal processing
hardware implementation
software implementation
weight assignment
information systems
np hard
pattern matching
low power consumption
hermite transform