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Self-referential verification for gate-level implementations of arithmetic circuits.

Ying-Tsai ChangKwang-Ting Cheng
Published in: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2004)
Keyphrases
  • model checking
  • asynchronous circuits
  • logic synthesis
  • data mining
  • high speed
  • floating point
  • face verification
  • digital circuits
  • verification method