Reconfiguration time overhead on field programmable gate arrays: reduction and cost model.
François DuhemFabrice MullerPhilippe LorenziniPublished in: IET Comput. Digit. Tech. (2012)
Keyphrases
- cost model
- field programmable gate array
- complex queries
- query optimization
- hardware implementation
- embedded systems
- parallel computing
- fpga technology
- hardware design
- query execution
- query processing
- image processing algorithms
- computing systems
- parallel architectures
- range queries
- massively parallel
- join algorithms
- hardware software co design
- parallel execution
- application specific integrated circuits
- regular expressions
- database
- graphical models
- pattern recognition
- execution plan
- database systems
- transactional memory
- databases