A background calibrated 28GS/s 8b interleaved SAR ADC in 28nm CMOS.
Michael Q. LeJames GoreckiJamal RianiJorge PernilloA. TanK. GopalakrishnanBelal HelalPulkit KhandelwalChang-Feng LoiIrene QuekP. WongAaron BuchwaldPublished in: CICC (2017)
Keyphrases
- cmos technology
- analog to digital converter
- low power
- nm technology
- low cost
- silicon on insulator
- single chip
- synthetic aperture radar
- power consumption
- multi view
- sar images
- high speed
- foreground objects
- image reconstruction
- parameter estimation
- analog vlsi
- cmos image sensor
- metal oxide semiconductor
- real time
- image sensor
- circuit design
- low voltage
- vlsi circuits
- sigma delta