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Shape Engineering for Custom Nanomagnetic Logic Circuits in NMLSim 2.0.

Lucas A. Lascasas FreitasJoão G. Nizer RahmeierOmar P. Vilela Neto
Published in: IEEE Des. Test (2021)
Keyphrases
  • logic circuits
  • low power
  • shape descriptors
  • functional decomposition
  • shape analysis
  • engineering design
  • domain specific
  • shape model
  • tunnel diode
  • power consumption
  • gate array
  • case study
  • pattern recognition