Investigation of Low-Power Low-Voltage Circuit Techniques for a Hybrid Full-Adder Cell.
Ilham HassouneAmaury NèveJean-Didier LegatDenis FlandrePublished in: PATMOS (2004)
Keyphrases
- cmos technology
- low power
- low voltage
- power dissipation
- logic circuits
- power consumption
- high speed
- low cost
- mixed signal
- power management
- vlsi circuits
- power line
- single chip
- power reduction
- low power consumption
- vlsi architecture
- image sensor
- gate array
- digital signal processing
- real time
- cost effective
- power saving
- design considerations
- parallel processing
- wireless networks
- digital images
- pattern recognition