SDPR: Improving Latency and Bandwidth in On-Chip Interconnect Through Simultaneous Dual-Path Routing.
Yoon Seok YangHrishikesh DeshpandeGwan ChoiPaul V. GratzPublished in: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2018)
Keyphrases
- high speed
- shortest path
- path selection
- link failure
- low latency
- high bandwidth
- clock frequency
- multiple paths
- routing algorithm
- multicast tree
- resource utilization
- message overhead
- network congestion
- routing scheme
- low cost
- network topology
- routing protocol
- interconnection networks
- high density
- routing problem
- bandwidth consumption
- network bandwidth
- bandwidth allocation
- multicast routing
- ip networks
- analog vlsi
- packet transmission